Index: src/vdbe.c ================================================================== --- src/vdbe.c +++ src/vdbe.c @@ -571,11 +571,11 @@ #endif int rc = SQLITE_OK; /* Value to return */ sqlite3 *db = p->db; /* The database */ u8 resetSchemaOnFault = 0; /* Reset schema after an error if positive */ u8 encoding = ENC(db); /* The database encoding */ - int iCompare = 0; /* Result of last OP_Compare operation */ + int iCompare = 0; /* Result of last comparison */ unsigned nVmStep = 0; /* Number of virtual machine steps */ #ifndef SQLITE_OMIT_PROGRESS_CALLBACK unsigned nProgressLimit = 0;/* Invoke xProgress() when nVmStep reaches this */ #endif Mem *aMem = p->aMem; /* Copy of p->aMem */ @@ -583,11 +583,10 @@ Mem *pIn2 = 0; /* 2nd input operand */ Mem *pIn3 = 0; /* 3rd input operand */ Mem *pOut = 0; /* Output operand */ int *aPermute = 0; /* Permutation of columns for OP_Compare */ i64 lastRowid = db->lastRowid; /* Saved value of the last insert ROWID */ - int cmpRes; /* Result of last comparison operation */ #ifdef VDBE_PROFILE u64 start; /* CPU clock count at start of opcode */ #endif /*** INSERT STACK UNION HERE ***/ @@ -2002,20 +2001,20 @@ assert( (pOp->p5 & SQLITE_JUMPIFNULL)==0 ); if( (flags1&MEM_Null)!=0 && (flags3&MEM_Null)!=0 && (flags3&MEM_Cleared)==0 ){ - cmpRes = 0; /* Operands are equal */ + iCompare = 0; /* Operands are equal */ }else{ - cmpRes = 1; /* Operands are not equal */ + iCompare = 1; /* Operands are not equal */ } }else{ /* SQLITE_NULLEQ is clear and at least one operand is NULL, ** then the result is always NULL. ** The jump is taken if the SQLITE_JUMPIFNULL bit is set. */ - cmpRes = 1; /* Operands are not equal */ + iCompare = 1; /* Operands are not equal */ if( pOp->p5 & SQLITE_STOREP2 ){ pOut = &aMem[pOp->p2]; memAboutToChange(p, pOut); MemSetTypeFlag(pOut, MEM_Null); REGISTER_TRACE(pOp->p2, pOut); @@ -2064,19 +2063,19 @@ } if( flags3 & MEM_Zero ){ sqlite3VdbeMemExpandBlob(pIn3); flags3 &= ~MEM_Zero; } - cmpRes = sqlite3MemCompare(pIn3, pIn1, pOp->p4.pColl); + iCompare = sqlite3MemCompare(pIn3, pIn1, pOp->p4.pColl); } switch( pOp->opcode ){ - case OP_Eq: res = cmpRes==0; break; - case OP_Ne: res = cmpRes!=0; break; - case OP_Lt: res = cmpRes<0; break; - case OP_Le: res = cmpRes<=0; break; - case OP_Gt: res = cmpRes>0; break; - case OP_Ge: res = cmpRes>=0; break; + case OP_Eq: res = iCompare==0; break; + case OP_Ne: res = iCompare!=0; break; + case OP_Lt: res = iCompare<0; break; + case OP_Le: res = iCompare<=0; break; + case OP_Gt: res = iCompare>0; break; + default: res = iCompare>=0; break; } /* Undo any changes made by applyAffinity() to the input registers. */ assert( (pIn1->flags & MEM_Dyn) == (flags1 & MEM_Dyn) ); pIn1->flags = flags1; @@ -2114,12 +2113,12 @@ ** using Eq would have been true (1), then fall through. */ case OP_ElseNotEq: { /* same as TK_ESCAPE, jump */ assert( pOp>aOp ); assert( pOp[-1].opcode==OP_Lt || pOp[-1].opcode==OP_Gt ); - VdbeBranchTaken(cmpRes!=0, 2); - if( cmpRes!=0 ) goto jump_to_p2; + VdbeBranchTaken(iCompare!=0, 2); + if( iCompare!=0 ) goto jump_to_p2; break; } /* Opcode: Permutation * * * P4 *