Many hyperlinks are disabled.
Use anonymous login
to enable hyperlinks.
Overview
| Comment: | Applied patch to fix failure with build on gcc-powerpc (provide sqlite3Hwtime). Ticket #3256. (CVS 5516) |
|---|---|
| Downloads: | Tarball | ZIP archive | SQL archive |
| Timelines: | family | ancestors | descendants | both | trunk |
| Files: | files | file ages | folders |
| SHA1: | c9ecd88e273aee56b4af5b69fae94e1f98d3e43d |
| User & Date: | shane 2008-08-01 14:33:15 |
Context
|
2008-08-01
| ||
| 15:06 | Add a permutation test case for running all OOM tests with lookaside disabled. (CVS 5517) check-in: 3f70e03a user: drh tags: trunk | |
| 14:33 | Applied patch to fix failure with build on gcc-powerpc (provide sqlite3Hwtime). Ticket #3256. (CVS 5516) check-in: c9ecd88e user: shane tags: trunk | |
| 10:50 | If xAccess() fails while attempting to detect a hot-journal file, do not assume that the error was an out-of-memory condition. (CVS 5515) check-in: 70f20425 user: danielk1977 tags: trunk | |
Changes
Changes to src/hwtime.h.
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
..
50
51
52
53
54
55
56
57
58
59
60
61
62
63
|
** May you share freely, never taking more than you give. ** ****************************************************************************** ** ** This file contains inline asm code for retrieving "high-performance" ** counters for x86 class CPUs. ** ** $Id: hwtime.h,v 1.2 2008/06/12 02:24:39 shane Exp $ */ #ifndef _HWTIME_H_ #define _HWTIME_H_ /* ** The following routine only works on pentium-class (or newer) processors. ** It uses the RDTSC opcode to read the cycle count value out of the ................................................................................ __inline__ sqlite_uint64 sqlite3Hwtime(void){ unsigned long val; __asm__ __volatile__ ("rdtsc" : "=A" (val)); return val; } #else #error Need implementation of sqlite3Hwtime() for your platform. /* ** To compile without implementing sqlite3Hwtime() for your platform, ** you can remove the above #error and use the following |
|
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
|
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
..
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
|
** May you share freely, never taking more than you give. ** ****************************************************************************** ** ** This file contains inline asm code for retrieving "high-performance" ** counters for x86 class CPUs. ** ** $Id: hwtime.h,v 1.3 2008/08/01 14:33:15 shane Exp $ */ #ifndef _HWTIME_H_ #define _HWTIME_H_ /* ** The following routine only works on pentium-class (or newer) processors. ** It uses the RDTSC opcode to read the cycle count value out of the ................................................................................ __inline__ sqlite_uint64 sqlite3Hwtime(void){ unsigned long val; __asm__ __volatile__ ("rdtsc" : "=A" (val)); return val; } #elif (defined(__GNUC__) && defined(__ppc__)) __inline__ sqlite_uint64 sqlite3Hwtime(void){ unsigned long long retval; unsigned long junk; __asm__ __volatile__ ("\n\ 1: mftbu %1\n\ mftb %L0\n\ mftbu %0\n\ cmpw %0,%1\n\ bne 1b" : "=r" (retval), "=r" (junk)); return retval; } #else #error Need implementation of sqlite3Hwtime() for your platform. /* ** To compile without implementing sqlite3Hwtime() for your platform, ** you can remove the above #error and use the following |