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Overview
| Comment: | Added x86_64 version of hwtime function. Ticket #3156. (CVS 5208) |
|---|---|
| Downloads: | Tarball | ZIP archive | SQL archive |
| Timelines: | family | ancestors | descendants | both | trunk |
| Files: | files | file ages | folders |
| SHA1: |
0729f5c3d01200190897488f14aec413 |
| User & Date: | shane 2008-06-12 02:24:39 |
Context
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2008-06-12
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| 05:16 | Added additional testcases for julianday calculations with midnight boundary for UTC time. (CVS 5209) (check-in: edd2cb00 user: shane tags: trunk) | |
| 02:24 | Added x86_64 version of hwtime function. Ticket #3156. (CVS 5208) (check-in: 0729f5c3 user: shane tags: trunk) | |
| 02:16 | Removed all C++ style comments. Ticket #3172. (CVS 5207) (check-in: 59f72425 user: shane tags: trunk) | |
Changes
Changes to src/hwtime.h.
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** May you share freely, never taking more than you give. ** ****************************************************************************** ** ** This file contains inline asm code for retrieving "high-performance" ** counters for x86 class CPUs. ** ** $Id: hwtime.h,v 1.1 2008/05/29 20:22:37 shane Exp $ */ #ifndef _HWTIME_H_ #define _HWTIME_H_ /* ** The following routine only works on pentium-class (or newer) processors. ** It uses the RDTSC opcode to read the cycle count value out of the ................................................................................ #if (defined(__GNUC__) || defined(_MSC_VER)) && \ (defined(i386) || defined(__i386__) || defined(_M_IX86)) #if defined(__GNUC__) __inline__ sqlite_uint64 sqlite3Hwtime(void){ unsigned int lo, hi; /* We cannot use "=A", since this would use %rax on x86_64 */ __asm__ __volatile__ ("rdtsc" : "=a" (lo), "=d" (hi)); return (sqlite_uint64)hi << 32 | lo; } #elif defined(_MSC_VER) __declspec(naked) __inline sqlite_uint64 __cdecl sqlite3Hwtime(void){ ................................................................................ rdtsc ret ; return value at EDX:EAX } } #endif #else #error Need implementation of sqlite3Hwtime() for your platform. /* ** To compile without implementing sqlite3Hwtime() for your platform, ** you can remove the above #error and use the following |
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** May you share freely, never taking more than you give. ** ****************************************************************************** ** ** This file contains inline asm code for retrieving "high-performance" ** counters for x86 class CPUs. ** ** $Id: hwtime.h,v 1.2 2008/06/12 02:24:39 shane Exp $ */ #ifndef _HWTIME_H_ #define _HWTIME_H_ /* ** The following routine only works on pentium-class (or newer) processors. ** It uses the RDTSC opcode to read the cycle count value out of the ................................................................................ #if (defined(__GNUC__) || defined(_MSC_VER)) && \ (defined(i386) || defined(__i386__) || defined(_M_IX86)) #if defined(__GNUC__) __inline__ sqlite_uint64 sqlite3Hwtime(void){ unsigned int lo, hi; __asm__ __volatile__ ("rdtsc" : "=a" (lo), "=d" (hi)); return (sqlite_uint64)hi << 32 | lo; } #elif defined(_MSC_VER) __declspec(naked) __inline sqlite_uint64 __cdecl sqlite3Hwtime(void){ ................................................................................ rdtsc ret ; return value at EDX:EAX } } #endif #elif (defined(__GNUC__) && defined(__x86_64__)) __inline__ sqlite_uint64 sqlite3Hwtime(void){ unsigned long val; __asm__ __volatile__ ("rdtsc" : "=A" (val)); return val; } #else #error Need implementation of sqlite3Hwtime() for your platform. /* ** To compile without implementing sqlite3Hwtime() for your platform, ** you can remove the above #error and use the following |